IBM 5nm chips

IBM Research Alliance and the 5nm Solution

People respect and even revere the IT industry for innovative computing products that regularly appear in the market. However, the availability of those solutions depends on equally or even more innovative manufacturing processes.

That underscores a fundamental truth about commercial technologies: You can have all the bright ideas in the world but unless you can successfully build and reliably produce products, bright ideas stay locked in a desk drawer.

What does that have to do with IBM and its Research Alliance partners, including GLOBALFOUNDRIES and Samsung announcement of an industry-first process for building silicon nanosheet transistors enabling 5 nanometer (nm) chips? Simply put; that barriers to commercially producing ever smaller, increasingly powerful and more energy efficient computer chips have fallen.

Why is that a big deal? According to IBM, compared to current leading-edge 10nm chips, nanosheet-based 5nm technologies can deliver as much as 40 percent better performance at fixed power, or 75 percent power savings at matched performance.

As a result, the company envisions 5nm chips accelerating cognitive computing, the Internet of Things (IoT), and data-intensive applications delivered in the cloud. The chips’ robust power efficiency could also result in smart phone and mobile device batteries lasting two to three times longer between charges than existing products.

Before going further, it’s important to note that this isn’t the first time 5nm transistors have been created. IBM itself produced a 6nm transistor in 2002 and NEC demonstrated a 5nm transistor the following year. Following that, various technology vendors and research labs created unique, even smaller transistors and working gates.

However, to quote Dr. Bernie Meyerson, IBM’s Chief Innovation Officer, when you reach atomic (5nm or less) levels, “life gets complicated.” In the world of semiconductors, that translates into increasing limitations on materials’ current-carrying capabilities and problematic issues like electron leakage.

How does that translate in the world of microprocessor production? Creating a 5nm transistor is hard enough but assembling billions of the little suckers into a working microprocessor is exponentially more difficult. And creating processes to reliably manufacture those chips? Exponentially harder.

But that’s precisely what IBM and its Research Alliance partners have done.

What’s so difficult about it? First, consider the reality of 5nm objects. A sheet of paper is 100,000nm thick and a human hair is about 80,000nm to 100,000nm wide. A single strand of human DNA is about 2.5nm in diameter or half the thickness of the Research Alliances new 5nm chips.

You get the nearly invisible, almost unimaginable picture.

The use of silicon nanosheets by Research Alliance scientists is also a first, and departs notably from future-looking designs utilizing nanowire. Those solutions tend to follow traditional FinFET designs by stacking nanowires into tall, thin, tightly pitched fins.

That supports the elemental goal of increasing the total number of transistors on a chip while maintaining or shrinking its footprint. But Alliance researchers experiments with nanowire performed poorly and suffered other imitations. However, by using silicon nanosheets to create stacked fins that were somewhat thicker than nanowire designs, researchers achieved optimal power/performance and increased transistor density.

Applying the same Extreme Ultraviolet (EUV) lithography approach used in the 7nm test node it delivered less than two years ago, the Alliance team was also able to continuously adjust the width of the nanosheets. That enabled specific circuits to be fine-tuned for increased performance and power, an important point since as IBM noted, FinFET chips can scale to 5nm but simply reducing the space between the fins does not support increased current flow for additional performance.

What happens next? Now IBM and its Research Alliance partners have to make 5nm processors cost-effectively replicable and their manufacturing processes commercially scalable. What does that mean in terms of the market? Not much in the short term.

The fact is that next gen 10nm chips from Intel and Qualcomm are nearing production and pilot production of future generation 7nm chips isn’t far away. At the same time, they and other companies will continue to press ahead with their own 5nm development efforts.

Those efforts are certainly worthy of respect but they shouldn’t detract from what IBM and its Global Alliance partners have achieved. By making possible what many once considered impossible, IBM and its partners are showing the way forward to new computing capabilities and innovations.

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